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Si4313-B1
8.5. GPIO Configuration
Three general purpose IOs (GPIOs) are available. Numerous functions such as specific interrupts, TRSW control,
microcontroller output, etc. can be routed to the GPIO pins as shown in the tables below. When in shutdown mode
all the GPIO pads are pulled low.
Note: The ADC should not be selected as an input to the GPIO in standby or sleep modes and will cause excess current con-
sumption.
Add R/W Function/Des
D7
D6
D5
D4
D3
D2
D1
D0
POR Def.
cription
0B
R/W
GPIO0
gpio0drv[1] gpio0drv[0]
pup0
gpio0[4] gpio0[3] gpio0[2] gpio0[1] gpio0[0]
00h
Configuration
0C
R/W
GPIO1
gpio1drv[1] gpio1drv[0]
pup1
gpio1[4] gpio1[3] gpio1[2] gpio1[1] gpio1[0]
00h
Configuration
0D
R/W
GPIO2
gpio2drv[1] gpio2drv[0]
pup2
gpio2[4] gpio2[3] gpio2[2] gpio2[1] gpio2[0]
00h
Configuration
0E
R/W
I/O Port
extitst[2]
extitst[1] extitst[0]
itsdo
dio2
dio1
dio0
00h
Configuration
The GPIO settings for GPIO1 and GPIO2 are the same as for GPIO0 with the exception of the 00000 default
setting. The default settings for each GPIO are listed below:
GPIO
GPIO0
GPIO1
GPIO2
00000—Default Setting
POR
POR Inverted
Microcontroller Clock
For a complete list of the available GPIOs see “AN440: EZRadioPRO Detailed Register Descriptions”.
The GPIO drive strength may be adjusted with the gpioXdrv[1:0] bits. Setting a higher value will increase the drive
strength and current capability of the GPIO by changing the driver size. Special care should be taken in setting the
drive strength and loading on GPIO2 when the microcontroller clock is used. Excess loading or inadequate drive
may contribute to increased spurious emissions.
38
Rev. 1.0
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